An in-circuit emulator is used for testing or debugging software for a computer system, such as a microcomputer, or for checking hardware operation. The target system software or hardware is checked or debugged by running a program (target program) in the computer system which becomes the emulation target (target system), by detecting the pattern of arbitrary execution information with a trace function during the execution, or by checking the state of each part within the system by interrupting the target program at break points with a break function.
Many emulators read out the contents or information in the main registers (e.g., accumulator or memory I/O register, etc.) within the target system by a scanning pass system to check the state of each part within the system at the break point.
A scanning pass system will be explained with reference to FIGS. 4-6. In FIG. 4, target system 100 is, for example, a microprocessor or DSP (digital signal processor) with various registers. Of the various registers, the registers of the main parts of the system, for example, the registers of the address system, the registers of the control system, and registers (I/O register) of the data system which reads or writes data by specifying a register name together with a program instruction, such as the memory I/O register or accumulator register, etc., are scanned during scanning passes (1), (2), (3), . . .
The structure of a register scanned during a scanning pass is shown in FIG. 5. As one possible example, the register has 4 bit positions. Each bit element of this type of register is composed of a master/slave latch circuit (flip-flops) FF0-FF3 in which serial scanning is possible as shown in FIG. 6.
In FIG. 6, flip-flop FFi in each step (digit) is composed of slave latch circuit LS which holds the data and master latch circuit LM which receives the data.
In the regular mode, determination of input data in master latch circuit LM and change in the output data in slave latch circuit LS are executed by synchronizing with phase shifted master clock MCLOCK and slave clock SCLOCK provided respectively to input gate circuits GM and GS. Therefore, while data is being input to master latch circuit LM, slave latch circuit LS holds and outputs the data of the previous cycle, receives the data from the master side at the data input port (gate circuit GS) of slave latch circuit LS which opens simultaneously with the closing of data input port (gate circuit GM) of master latch circuit LM, and the output data is updated. In the regular mode, the other (scan use) input gate circuit GT of master latch circuit LM is closed. Therefore, the register in FIG. 6 operates as a parallel in/parallel out type register.
During the scanning pass mode, feeding of master clock MCLOCK stops, gate circuit GM closes, and instead test clock TCLOCK is fed to gate circuit GT. Thus, data from the scan in input terminal is input to master latch circuit LM by synchronizing with test clock TCLOCK, then this data is input to slave latch circuit LS by synchronizing with slave clock SCLOCK, and is output to flip-flop (FFi+1) in the next step. In this way, the register in FIG. 6 operates as a serial in/serial out type register in the scanning pass mode.
As noted above, each register connected to the scanning bus is formed to input and output the data in parallel in the regular mode and to serially input and output the data in the scanning pass mode.
Generally, multiple scanning passes are provided within one computer system and one or more registers are connected in series on each scanning pass. For example, in target system 100 shown in FIG. 4, two registers RA1 and RA2 are connected in series on first scanning pass (1), three registers RB1, RB2, and RB3 are connected in series on second scanning pass (2), and two registers RC1 and RC2 are connected in series on third scanning pass (3). Both terminals of each scanning pass (1), (2), (3), . . . are connected to emulator 110 via data input/output terminals 106 and 108 and multiplexers 102 and 104. The number and arrangement of the registers and scanning passes shown in FIG. 4 are just one example, which is used for the sake of explanation.
When the program in target system 100 is stopped at a prescribed break point in the emulation, information expressing the system state at this point in time is held in registers RA1, RA2, . . . Emulator 110 successively selects scanning passes (1), (2), (3), . . . by switching mutliplexers 102 and 104, feeds test clock pulse TCLOCK and slave clock pulse SCLOCK to each register on the selected scanning pass, then sequentially reads the contents of each register to the outside of target system 100, then latches the contents by moving serially during the scanning pass. Emulator 110 knows ahead of time the order of the registers during each scanning pass, so that a series of serial data included with each scanning pass is separated for each register and the content (information) of each register is displayed on the screen of display 112 at the break point.
In the custom design of a computer system, the main part of the system is designed by the manufacturer as the core and the remainder is left to the customer. In this case, each register within the core is scanned during one of the scanning passes as described above. On the other hand, there are times when the customer uses register RX outside the core as one of the system elements (FIG. 4) and desires to monitor the register contents during emulation. Normally, multiple I/O registers are prepared outside the core and are selected by the customer.
Conventionally, when there was such a specification request from the customer, selected I/O register Rx outside the core was scanned during one of the scanning passes, and during the emulation, the contents of the register Rx were read by sequentially scanning during the scanning pass which includes the core register.
However, when register Rx outside the core is included in the scanning pass, in addition to the requirement of making even this register Rx into a register composed of a master/slave type latch circuit which can be serially scanned, the software on the emulator 110 side must be changed since the layout and the arrangement pattern of the register change during the scanning pass which includes the register Rx. Moreover, the register arrangement pattern changes arbitrarily during one of the scanning passes for each request specified by the customer, so that there was the problem of changing or developing emulator software each time; thus, the design efficiency was low.
The present invention was conceived in light of the problems, and it aims to provide a method which can read various registers within a computer system being emulated without changing the emulator software.
Another objective of the present invention is to provide a method which can read or write from an emulator with respect to a register not included in the scanning pass within the computer system.